Renesas Electronics Corporation today launched the new generation of automotive fusion system-on-chips (SoCs), serving multiple automotive domains including Advanced Driver Assistance Systems (ADAS), in-vehicle infotainment (IVI), and gateway applications on a single-chip. Built using the latest 3-nanometer (nm) automotive process technology, the highly-anticipated R-Car X5H SoC, which is the first device in the R-Car X5 series.
As the highest performance device within the fifth-generation (Gen 5) R-Car Family, the R-Car X5H directly addresses the growing complexity of Software-Defined Vehicle (SDV) development. These challenges include optimizing compute performance, power consumption, cost, hardware and software integration – while ensuring vehicle safety. By tightly coupling application processing, real-time processing, GPU and AI compute, large display capabilities, and sensor connectivity on a single chip, these devices enable a new class of automated driving, IVI and gateway applications.
The new SoC series enables AI acceleration of up to 400 TOPS with industry-leading TOPS/W performance, and GPU processing of up to 4 TFLOPS. It incorporates a total of 32 Arm® Cortex®-A720AE CPU cores for application processing, delivering over 1,000K DMIPS performance; and six Arm Cortex-R52 dual lockstep CPU cores delivering over 60K DMIPS performance with support for ASIL D capabilities without external microcontrollers (MCUs). Manufactured using one of TSMC’s most advanced process nodes, the new SoC series achieves both top-end CPU performance and a 30-35 percent reduction in power consumption2 compared to devices designed for a 5-nm process node. These power-efficient features significantly lower overall system costs by eliminating the need for additional cooling solutions while also extending vehicle driving range.
While the R-Car Gen 5 SoCs come with powerful native NPU and GPU processing engines, Renesas is offering customers the ability to scale up their performance through chiplet extensions. When combining a 400-TOPS on-chip NPU with an external NPU via a chiplet extension, for example, it’s possible to scale their AI processing performance by three to four times or more. For seamless chiplet integration, the R-Car X5H offers the standard UCle (Universal Chiplet Interconnect Express) die-to-die interconnect and APIs, facilitating interoperability with other components in a multi-die system, even if they are non-Renesas chips. This flexible design approach allows car OEMs and Tier 1s to mix and match different functions and customize their systems including future upgrades across vehicle platforms.
While automakers and Tier-1 suppliers are demanding more performance and functionality, safety remains their number one priority. While other SoCs rely solely on software-based isolation, the R-Car X5H SoC also offers hardware-based Freedom from Interference (FFI) technology. This hardware design implementation securely isolates safety-critical functions, such as brake-by-wire, from non-critical functions. Functions deemed safety critical can be assigned their own separate, redundant domains, each having its own independent CPU core, memory and interfaces, thus preventing potentially catastrophic vehicle failures in the event of a hardware or software fault from a different domain. The R-Car X5H also comes with Quality of Service (QoS) management that determines workload priorities and assigns processing resources in real time.
Thanks to a new unified hardware architecture based on Arm CPU cores, R-Car Gen 5 developers can reuse the same software and tools and applications from Renesas’ broad line of new 64-bit SoCs andfuture products including crossover 32-bit MCUs and automotive 32-bit MCUs. As part of the R-Car next-generation family, Renesas is extending its vehicle control portfolio with a new R-Car MCU series, which will be also powered by Arm. Renesas plans to sample the new 32-bit MCU series with enhanced security for body and chassis applications in Q1/2025.
